Performance evaluation and reliability analysis of gate all around tunnel FETs

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dc.contributor.authorKumar, Pankaj
dc.date.accessioned2023-11-06T11:03:51Z
dc.date.available2023-11-06T11:03:51Z
dc.date.issued2023-10
dc.identifier.urihttp://hdl.handle.net/123456789/2928
dc.language.isoenen_US
dc.publisherIndian Institute of Technology (Indian School of Mines) Dhanbaden_US
dc.subjectIntegrated Circuit (IC)en_US
dc.subjecttunnel field-effect transistoren_US
dc.subjectTFET mechanismen_US
dc.subjectPh.Den_US
dc.subjectECEen_US
dc.subjectPH2612en_US
dc.titlePerformance evaluation and reliability analysis of gate all around tunnel FETsen_US
dc.typeThesisen_US
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