Design of low power digital circuits in deep submicron CMOS technologies

Kumar, Manish2017-11-212017-11-212014-03http://hdl.handle.net/123456789/854enDynamic power dissipationLeakage power dissipationDeep submicronNanoscale deviceSuper cutoff CMOS (SCCMOS) techniqueECEPh.DDesign of low power digital circuits in deep submicron CMOS technologiesThesis