Computational techniques and performance evaluation of nanoscale strained mosfets and related CMOS circuits
dc.contributor.author | Kumari, Amrita | |
dc.date.accessioned | 2017-11-22T05:06:54Z | |
dc.date.available | 2017-11-22T05:06:54Z | |
dc.date.issued | 2017-03 | |
dc.identifier.uri | http://hdl.handle.net/123456789/879 | |
dc.language.iso | en | en_US |
dc.publisher | Indian Institute of Technology (Indian School of Mines), Dhanbad | en_US |
dc.subject | Channel effects | en_US |
dc.subject | Biaxial strain | en_US |
dc.subject | Dual channel biaxial strained | en_US |
dc.subject | MOSFET based CMOS inverter | en_US |
dc.subject | Threshold voltage | en_US |
dc.subject | ECE | en_US |
dc.subject | Ph.D | en_US |
dc.title | Computational techniques and performance evaluation of nanoscale strained mosfets and related CMOS circuits | en_US |
dc.type | Thesis | en_US |
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