Emulation friendly modelling of RF power amplifier for pre-silicon verification

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Date
2024-05
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Indian Institute of Technology (Indian School of Mines) Dhanbad
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Description
Keywords
Generalized memory polynomial GMP model, PA modelling, PA architectures, DIST, DS1537, ECE
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http://hdl.handle.net/123456789/4044
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Rahul Bhattacharya