Emulation friendly modelling of RF power amplifier for pre-silicon verification
dc.contributor.author | Shakeel, Abuzar | |
dc.date.accessioned | 2024-11-05T05:01:57Z | |
dc.date.available | 2024-11-05T05:01:57Z | |
dc.date.issued | 2024-05 | |
dc.identifier.uri | http://hdl.handle.net/123456789/4044 | |
dc.language.iso | en | en_US |
dc.publisher | Indian Institute of Technology (Indian School of Mines) Dhanbad | en_US |
dc.subject | Generalized memory polynomial GMP model | en_US |
dc.subject | PA modelling | en_US |
dc.subject | PA architectures | en_US |
dc.subject | DIST | en_US |
dc.subject | DS1537 | en_US |
dc.subject | ECE | en_US |
dc.title | Emulation friendly modelling of RF power amplifier for pre-silicon verification | en_US |
dc.type | Thesis | en_US |
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